PHYSICAL DESIGN

Semiconductor industry professional with 21+ years SEMICONDUCTOR DESIGN experience specialized in EDA, RTL2GDSII, Synthesis, Physical Design, Low Power and STA (Static Timing Analysis). Worked for companies like Cadence, Magma, AMD, Synopsys, Infineon, Mediatek, Qualcomm, Intel etc. globally through geographies. Have worked on multi-million gate designs at block level, sub-system level and top level from 250 nm to 7nm. Have trained about 800 people worldwide who are working for various product and services companies. Approachable person who is passionate in delivering training from ground zero to core level and mentoring candidates to leverage upcoming generation on the core area of SEMICON DESIGN. Have done finishing school trainings in Bangalore, Hyderabad, Noida, USA, Europe and Taiwan. Domain projects include EDA at algorithmic level at Cadence Design Systems, Magma Design Automation, Synopsys EDA Software, Automotive chip, Hard Disk Controller chips, Mobile processor series, Graphics processor designs and General-purpose CPU processor designs and Vision application IoT design. Member of Board of start-up companies and driven multiple Business closures techno-commercially in semiconductor and associated domains of IoT, AI, ML. Immensely passionate in delivering bootcamp trainings